1. Field of the Invention
The present invention relates to a method for erasing a memory, and more particularly to a method for erasing a split-gate flash memory.
2. Description of Prior Art
During the operating process of conventional flash memory cells, electrons are normally pulled out of the floating gate by the Fowler-Nordhelm tunneling effect. Referring to FIG. 1, when erasing, the source terminal 10 remains floating or grounded according to the requirements of the circuit. A voltage of -12 volts is applied to the control gate 12. A voltage of 5 volts is applied to the drain 14. Thus the electrons in the floating gate 16 are discharged by the electrical field effect according to Fowler-Nordhelm tunneling effect. The holes gain energy and become hot holes due to the electrical field generated by the voltage difference between the control gate 12 and the drain 14, thus increasing the probability of capturing holes in the oxide layer.
Moreover, the intensity of the lateral electrical field increases since the channel becomes relatively short as the flash memory cell is shrunk. Consequently, the hot holes have a significant effect when the channel length is shorter than 0.8 .mu.m, resulting in an inferior erasing efficiency. A split gate flash memory cell also having a short channel effect, for example when the channel length of floating gate is under 0.35 .mu.m, is easily damaged since the probability of forming hot holes is markedly increased by the lateral electrical field while erasing.
Flash memory is widely used in notebook computers, digital cameras and digital mobile telephones, etc., due to its low power consumption and rapid access. However, the number of rewritable cycles for a flash memory must be increased for further applications. At present, the number of rewritable cycles for each flash memory is about 10,000. A 1000,000-cycle flash memory is needed to fabricate a desired silicon disk driver.
The reason that the flash memory can not be erased any more after several-thousand times of rewriting is that a large amount of hot holes are captured in the tunnel oxide while erasing, and the electrical field produced by the hot holes reduces the erasing efficiency. To reduce the hot hole trap formed during erasure, the energy that the holes gained while being accelerated by the electrical field must be effectively reduced.
Conventionally, a split gate flash memory is programmed by source side injection, such as the manner disclosed in "A new flash-erase EEPROM cell with a sidewall select-gate on its source side," Technical Digest of IEEE Electron Device Meeting 1988, by Naruka et al. Refer to FIG. 2, in which the programming is performed at the source side, that is, the source 10 is grounded, a voltage of 12 volts is applied to the control gate 12, a voltage of 5 volts is applied to the drain 14, and a voltage of 1.8 volts is applied to the select gate 18, thus the electrons can be injected from the source side into the floating gate 16. Conversely, the flash memory is erased by the Fowler-Nordhelm tunneling effect at the drain side. As described above, the rewritable cycle of the flash memory cell can be reduced because the amount of hot holes being captured increases.
Further, during the period of erasure, the holes produced by band-to-band tunneling current are accelerated by the lateral electrical field and become hot holes. The hot holes are attracted by the negative voltage applied to the control gate and then move upwardly to collide with the oxide layer and form many hole traps in the oxide. The electrical field produced by the holes stimulated in the oxide layer will block the electrical field formed between the drain and the control gate. Accordingly, the electrons in the floating gate can not be discharged effectively even when a positive voltage and a negative voltage are applied to the drain and the control gate, respectively. This results in a reduction of the number of rewritable cycles for a memory cell.